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Ripple & Noise in AC/DC Power Adapters

  • 2026-09-17
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Ripple & Noise in AC/DC Power Adapters

1. What is ripple noise?

A power adapter's job is to deliver a clean DC voltage — say +12 V, +5 V, or +24 V — to your device. In reality, that DC output is never perfectly flat. If you hook an oscilloscope to the output, you'll see the DC level (Vdc) with small AC variations riding on top. Those unwanted AC components are collectively called ripple and noise (or "output ripple voltage", sometimes "PARD" — Periodic And Random Deviation).

The diagram above shows exactly what this looks like: a roughly periodic wobble around Vdc (the ripple), punctuated by sharp, narrow transient spikes that happen every switching cycle.


2. Where does it come from?

2.1 Switching-frequency ripple (the dominant component)

A switched-mode power supply (SMPS) chops the input DC at a high frequency — typically 65 kHz, 100 kHz, or130 kHz for older designs, and 200 – 500 kHz for modern compact adapters. Every time the switch turns on or off, energy is shoved into the output filter capacitor and then drained by the load. The capacitor can't be perfect, so the output voltage wiggles in step with the switching — that's the sine-like ripple you see at the fundamental f_sw and its harmonics (2f_sw, 3f_sw, …).

2.2 Switching transients / spikes

When the MOSFET turns on or off, very high-frequency oscillations (tens to hundreds of MHz) ring out across the parasitic inductances and capacitances of the switching node. These ride on top of every switching edge as a sharp spike. They show up as the narrow vertical pokes in the diagram.

2.3 Line-frequency ripple

At light load, the converter may operate in burst mode or DCM (discontinuous conduction mode), where the controller skips switching cycles. This can re-introduce a 100 Hz / 120 Hz component (twice the AC line frequency) on the output — sometimes called "double-line ripple."

2.4 Random / broadband noise

Thermal noise from resistors, semiconductor shot noise, and conducted EMI from the rest of the circuit add a low-level broadband floor underneath the structured ripple.


3. Ripple vs. noise vs. spike — what's the difference?

TermFrequency rangeWhat it looks likeTypical cause
Ripplef_sw and its harmonics (kHz–MHz)Periodic, sinusoidal-ishEnergy storage/release in output LC filter
Switching spike / transient10 – 200 MHz, narrow (<100 ns)Sharp vertical pokes at every switch edgeParasitic L/C ringing at the switching node
Line-frequency ripple100 / 120 HzSlow envelope, especially visible at light loadBurst-mode or insufficient control loop gain
Random noiseBroadbandFuzz under the structured componentsThermal, semiconductor, EMI floor

In datasheets, "ripple & noise" is usually given as a single peak-to-peak number — typically measured over a 20 MHz bandwidth, at the rated load, with a small probe-tip-and-ground-spring connection right at the output capacitor.


4. Why does it matter?

Different applications have very different tolerances:

  • Digital circuits (MCUs, FPGAs, logic) — Usually fine with 50 – 100 mVpp. Their power-rail-reject ratios handle it.

  • Analog signal chains (sensors, op-amps, ADCs) — Ripple shows up as a periodic error on measurements. 16-bit ADCs typically need < 1 mVpp on the analog supply.

  • Audio — Audible hum / buzz, especially with 100/120 Hz components.

  • Video / imaging — Visible banding, hum bars.

  • RF / wireless — Can desensitize receivers, raise phase noise, cause LO leakage.

  • Medical / precision instrumentation — Patient-monitor signal integrity, ECG baseline wander, infusion-pump motor control — typically demand < 30 – 50 mVpp and very low LF components.

A noisy supply can also degrade EMC compliance — ripple harmonics radiate and conduct, showing up in EMI testing.


5. How is it measured?

The standard setup is:

  1. Scope bandwidth = 20 MHz (standard for most datasheets). Anything above that is filtered.

  2. Load = rated full load, at the worst-case combination of line and load.

  3. Probe tip + ground spring placed right at the output capacitor, not at the load end of a long wire.

  4. Measurement = peak-to-peak, Vpp = Vmax − Vmin.

Different vendors specify differently (peak-to-peak vs RMS vs with/without bandwidth limit), so when you compare datasheets, make sure the test conditions match.


6. How is it reduced?

Several techniques, used in combination:

TechniqueWhere it actsTrade-off
Bigger output capacitor (lower ESR)Reduces ripple amplitude directlyBigger size, higher cost
π-filter (L-C-L)Two stages of filteringAdds an inductor; occupies board space
LDO post-regulatorStrips everything above a few kHzPower lost as heat (dropout × I_load)
Multi-stage filteringEach stage attenuates furtherCascading reduces efficiency slightly
Spread-spectrum switchingSpreads f_sw energy across a band, reduces discrete peaksSlightly worse ripple amplitude, much better EMI
Better PCB layoutShorter high-di/dt loops, proper ground planeDesign-time cost
Snubber / gate-drive tuningDampens ringing at the switching nodeAdds parts

For low-noise applications (audio, medical, precision analog), the most common pattern is: SMPS → LC filter → LDO. The SMPS gives efficiency, the LDO gives the clean DC the sensitive circuitry needs.


7. Typical values at a glance

(See the three boxes at the bottom of the diagram.)

  • Linear PSU — < 1 – 5 mVpp. The cleanest, but bulky and inefficient (especially at higher power).

  • General-purpose switching PSU — 30 – 200 mVpp. Standard for IT, consumer, industrial gear.

  • Medical / precision — < 30 – 50 mVpp. Often achieved with LDO post-regulation or extra filtering stages.


8. Standards and references

  • IEC 61204 — DC output low-voltage power supply performance.

  • IEEE 1515 — Measurement methods for ripple.

  • EN 55032 / CISPR 32 — Conducted & radiated emissions (affected by ripple harmonics).

  • IEC 60601-1 (medical) — Drives the stricter ripple/noise limits for patient-contact devices.


9. Practical selection checklist

When picking a power adapter for a noise-sensitive application, ask:

  1. What's the noise budget? Look at your downstream ADC / analog front-end data sheet and find the PSRR (power-supply rejection ratio) at the relevant frequencies.

  2. What load conditions? Ripple typically worsens at light load (burst mode) or full load (peak current).

  3. Is there room for an LDO? If yes, the SMPS can be relaxed and you save cost.

  4. Do you need to pass EMC? If yes, look at spread-spectrum or sync-able clocking options.

  5. Is the spec measured at 20 MHz BW? If the vendor quotes 100 MHz or full-bandwidth numbers, the actual Vpp at20 MHz will be much lower.


Ripple_and_Noise_on_a_DC_Output.png

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